By Guy Lemieux
Programmable common sense units (PLDs) became the major implementation medium for nearly all of electronic circuits designed this day. whereas the highest-volume units are nonetheless outfitted with full-fabrication instead of box programmability, the craze in the direction of ever fewer ASICs and extra FPGAs is apparent. This makes the sector of PLD structure ever extra very important, as there's more advantageous call for for speedier, smaller, more affordable and lower-power programmable common sense. PLDs are ninety% routing and 10% good judgment. This ebook specializes in that ninety% that's the programmable routing: the way during which the programmable wires are attached and the circuit layout of the programmable switches themselves. a person looking to comprehend the layout of an FPGA must develop into lit erate within the complexities of programmable routing structure. This ebook builds at the state of the art of programmable interconnect through offering new equipment of investigating and measuring interconnect constructions, in addition to new programmable change uncomplicated circuits. The early element of this e-book offers a very good survey of interconnec tion constructions and circuits as they exist this day. Lemieux and Lewis then supply a brand new solution to layout sparse crossbars as they're utilized in PLDs, and express that the strategy works with an empirical validation. this can be one in all a number of routing structure works that hire analytical the right way to take care of the routing archi tecture layout. The research allows attention-grabbing insights no longer more often than not attainable with the normal empirical approach.
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Additional info for Design of Interconnection Networks for Programmable Logic
Parameter k N I Lwire W Fs Fc FCDU1 Architectural parameters. 1. In this model, a PLD is composed of clustered logic blocks (CLBs), switch blocks (S), connection blocks (C), and 110 blocks. Each CLB, which implements the user's logic, has inputs and outputs connected by the routing network. Between the rows and columns of an array of CLBs are the routing channels containing S blocks and C blocks. The C block connects the input and output pins of a CLB to the routing channel, and the S block connects the wires of two intersecting (orthogonal) channels.
This makes these approaches impractical for general use in PLDs, where the number of inputs and outputs must remain flexible during architecture exploration. Very recent advances in the explicit construction of expanders have been made by Capalbo et al [CRVW02]. The construction method works for any number of inputs or outputs and a fixed number of connections. If the method proves to be practical, it will be extremely useful for the creation of sparse crossbars given in Chapter 4. The practical application of expanders, superconcentrators, and other graphtheoretical structures depends on whether they can be constructed for small values of n.
The term population refers to the number of switches in the crossbar, p, such that 0 :::; p :::; n· m. This can also be expressed as a density. The capacity c is determined by p as well as the precise location of switches within the crossbar. The number of switches connecting to an input (or output) wire is itsjan-out (jan-in). If all outputs have the same fan-in, they are said to be balanced. If the largest difference in fan-in across the output wires is k, they are said to have nearly balanced fan-in within k.
Design of Interconnection Networks for Programmable Logic by Guy Lemieux